IP Logic Design Engineer - Coherent Fabric, Caching controllers, Memory Controller

Intel

1000+ employees, Public
Location: US, California, Santa Clara · US, Massachusetts, Beaver Brook
Salary Range: Salary range USD 121,050 - 170,890 / year
Source: Lightspeed
Posted: Jan 26, 2025
Found: Jan 26, 2025

Job Description

Department: Not specified

Skills & Keywords

Artificial Intelligence, Register Transfer Level, Automation, Low Power, Database Caching, Verilog, Performance Tuning, TCL, Static Timing Analysis, Integrated Circuit Design
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